After a long wait, the last components for the USB 3.0 to FPGA board arrived. Board is now reflown.
Both ends work, Spartan 6 FPGA detected via JTAG and FT601Q detected via USB3.0.
Being occupied with a few other projects at the moment, it probably will take a bit before I have time to write the appropriete VDHL and Windows D3XX code to fully test it. Hopefully in a few weeks I’ll be able to get some realtime fast data acquisition going with it.
-Duke
